Accelerators - Performance Boosters or Productivity Killers?

Thursday, August 29, 2013, 16:30-18:00
Chair: Matthias Müller, RWTH Aachen University, Germany

Panelists:

• Arndt Bode - Leibniz Supercomputer Centre & TU München, Germany
• Luiz DeRose - Cray Inc., USA
• Axel Köhler - NVIDIA, Germany
• Satoshi Matsuoka - Tokyo Institute of Technology, Japan
• Timothy Mattson - Intel Corporation, USA

Abstract. Accelerating the computation with the help of special purpose devices has a long history in high-performance computing. The latest trend has been sparked with the use of graphics cards as general processing devices. The performance and energy efficiency measured in Flops/Watt is impressive. The downside is the increased complexity of hybrid systems. Initial approaches to program those systems were vendor specific and rather complex to use. This was addressed with the invention and adaption of various programming models. Program developers now face the challenge of choosing among a vast number of options. This panel will discuss the current situation of accelerators and analyze long term-trends to provide insight and guidance for the attendees to make the right choice regarding the use of accelerators.

Panelists

Arndt Bode - Leibniz Supercomputer Centre & TU München, Germany. Prof. Dr. Arndt Bode is a full professor for Informatics at Technische Universität München since 1987, leading a research group for computer architecture and parallel and distributed computing. Since October 2008 he is also heading the Leibniz Supercomputer Centre of the Bavarian Academy of Sciences and Humanities in Munich. From 1999 to 2008 he was Vice President and CIO of Technische Universität München. He is author of more than 200 publications on parallel and distributed architectures, programming tools and applications.

Luiz DeRose - Cray Inc., USA. Dr. Luiz DeRose is a Senior Principal Engineer and the Programming Environments Director at Cray Inc, where he is responsible for the programming environment strategy for all Cray systems. Before joining Cray in 2004, he was a research staff member and the Tools Group Leader at the Advanced Computing Technology Center at IBM Research. Dr. DeRose had a Ph.D. in Computer Science from the University of Illinois at Urbana-Champaign. With more than 20 years of high performance computing experience and a deep knowledge of its programming environments, he has published more than 50 peer-reviewed articles in scientific journals, conferences, and book chapters, primarily on the topics of compilers and tools for high performance computing. Dr. DeRose participated in the definition and creation of the OpenACC standard for accelerators high level programming. He is the Global Chair for the Multicore and Manycore Programming topic in Euro-Par 2013 and was the Program Committee co-Chair at the 21st International Conference on Parallel Architecture and Compilation Techniques PACT-2012.

Axel Koehler - NVIDIA, Germany. Axel Koehler is a Senior Solution Architect for HPC at NVIDIA. He designs solutions for HPC environments using the NVIDIA GPU software ecosystem and the Tesla server products and supports customers, OEMs/partners and ISVs in using the GPU technology. Prior to joining NVIDIA in January 2011, Axel worked at Sun Microsystems for 14 years in the global HPC team as lead architect. He was responsible for the architecture and the design of large HPC cluster installations like the JUROPA system in Juelich. From 1992 until 1996 he worked as a System Engineer at Deutsches Elektronen Synchrotron (DESY) Zeuthen. Axel holds a diploma degree in computer science from the Technical University of Dresden.

Satoshi Matsuoka - Tokyo Institute of Technology, Japan. Satoshi Matsuoka is a Professor at the Tokyo Institute of Technology. His TSUBAME series of supercomputers became 4th fastest on the 2010 Top500 and the 2010/2011 Green 500 "Greenest Production Supercomputer in the World". He co-lead the Japanese national grid project NAREGI 2003-2007, and leads various projects such as Billion-Way Resiliency and Green Supercomputing. He has chaired many conferences, including the 2009 Technical Papers, 2011 Community, 2013 Program for ACM/IEEE Supercomputing. He is a fellow of ACM and ISC, and has won many awards including the 2006 JSPS Prize from his Highness Prince Akishinomiya, and the 2011 ACM Gordon Bell.

Tim Mattson - Intel Corporation, USA. Tim Mattson is a principle engineer in Intel's Microprocessor and Programming Research laboratory. He is an old fashioned application programmer with experience in quantum chemistry, seismic signal processing, and molecular modeling and has used more parallel programming models than he can keep track of. Tim was part of the teams that created OpenMP and OpenCL. Most recently, he has been working on the memory and execution models for the next major revision of OpenCL. Tim has published extensively including the books Patterns for Parallel Programming (with B. Sanders and B. Massingill, Addison Wesley, 2004), An Introduction to Concurrency in Programming Languages (with M. Sottile and C. Rasmussen, CRC Press, 2009), and the OpenCL Programming Guide (with A Munshi, B. Gaster, J. Fung, and D. Ginsburg, Addison Wesley, 2011).

Chair

Matthias Mueller - RWTH Aachen University, Germany. Matthias S. Mueller is full professor for High Performance Computing at RWTH Aachen University and director of the Computation and Communication Center at RWTH. He received his PhD in Computational Physics from Stuttgart University in 2001. From 1999 to 2005 he worked at the High Performance Computing Center (HLRS) in Stuttgart, Germany, which he left as a deputy director. From 2005 until 2012 he was deputy director and CTO at the Center for Information Services and High Performance Computing (ZIH) at Technische Universität Dresden. His research interests include programming methodologies, software development tools and computational science on high performance computers. He published more than 70 peer-reviewed articles in these areas. He is a member of ACM, ACM SIGHPC, the German Physical Society (DPG), and Vice Chair of SPEC’s High Performance Group.